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MC14585B 4-Bit Magnitude Comparator
The MC14585B 4-Bit Magnitude Comparator is constructed with complementary MOS (CMOS) enhancement mode devices. The circuit has eight comparing inputs (A3, B3, A2, B2, A1, B1, A0, B0), three cascading inputs (A < B, A = B, and A > B), and three outputs (A < B, A = B, and A > B). This device compares two 4-bit words (A and B) and determines whether they are "less than", "equal to", or "greater than" by a high level on the appropriate output. For words greater than 4-bits, units can be cascaded by connecting outputs (A > B), (A < B), and (A = B) to the corresponding inputs of the next significant comparator. Inputs (A < B), (A = B), and (A > B) on the least significant (first) comparator are connected to a low, a high, and a low, respectively. Applications include logic in CPU's, correction and/or detection of instrumentation conditions, comparator in testers, converters, and controls.
http://onsemi.com MARKING DIAGRAMS
16 PDIP-16 P SUFFIX CASE 648 MC14585BCP AWLYYWW 1 16 SOIC-16 D SUFFIX CASE 751B 1 16 SOEIAJ-16 F SUFFIX CASE 966 1 A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week MC14585B AWLYWW 14585B AWLYWW
* * * * * *
Diode Protection on All Inputs Expandable Applicable to Binary or 8421-BCD Code Supply Voltage Range = 3.0 Vdc to 18 Vdc Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load over the Rated Temperature Range Can be Cascaded - See Fig. 3
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.)
Symbol VDD Vin, Vout Iin, Iout PD TA Tstg TL Parameter DC Supply Voltage Range Input or Output Voltage Range (DC or Transient) Input or Output Current (DC or Transient) per Pin Power Dissipation, per Package (Note 3.) Ambient Temperature Range Storage Temperature Range Lead Temperature (8-Second Soldering) Value - 0.5 to +18.0 - 0.5 to VDD + 0.5 10 500 - 55 to +125 - 65 to +150 260 Unit V V
ORDERING INFORMATION
Device Package PDIP-16 SOIC-16 SOIC-16 SOEIAJ-16 Shipping 2000/Box 48/Rail 2500/Tape & Reel See Note 1.
mA mW
MC14585BCP MC14585BD MC14585BDR2
C C C
MC14585BF
1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative.
2. Maximum Ratings are those values beyond which damage to the device may occur. 3. Temperature Derating: Plastic "P and D/DW" Packages: - 7.0 mW/_C From 65_C To 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS (Vin or Vout) VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open.
v
v
(c) Semiconductor Components Industries, LLC, 2000
1
March, 2000 - Rev. 3
Publication Order Number: MC14585B/D
MC14585B
PIN ASSIGNMENT
B2 A2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD A3 B3 (A
(A
u B)in (A t B)in
(A = B)in A1 VSS
(A = B)out
u B)out (A t B)out
B0 A0 B1
BLOCK DIAGRAM
4 6 5 10 11 7 9 2 1 15 14 (A > B)in (A = B)in (A < B)in A0 B0 A1 B1 A2 B2 A3 B3
(A > B)out
13
(A = B)out
3
(A < B)out
12
VDD = PIN 16 VSS = PIN 8
TRUTH TABLE (x = Don't Care)
Inputs Comparing A3, B3 A3 > B3 A3 = B3 A3 = B3 A3 = B3 A3 = B3 A3 = B3 A3 = B3 A3 = B3 A3 = B3 A3 = B3 A3 = B3 A3 < B3 A2, B2 x A2 > B2 A2 = B2 A2 = B2 A2 = B2 A2 = B2 A2 = B2 A2 = B2 A2 = B2 A2 = B2 A2 < B2 x A1, B1 x x A1 > B1 A1 = B1 A1 = B1 A1 = B1 A1 = B1 A1 = B1 A1 = B1 A1 < B1 x x A0, B0 x x x A0 > B0 A0 = B0 A0 = B0 A0 = B0 A0 = B0 A0 < B0 x x x x x x x 0 0 1 1 x x x x Cascading AB x x x x x x x x x x x x AB 1 1 1 1 1 0 0 0 0 0 0 0
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MC14585B
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ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)
Characteristic Symbol VOL VDD Vdc 5.0 10 15 5.0 10 15 5.0 10 15 VIH 5.0 10 15 IOH Source 5.0 5.0 10 15 IOL 5.0 10 15 15 -- 5.0 10 15 5.0 10 15 - 3.0 - 0.64 - 1.6 - 4.2 0.64 1.6 4.2 -- -- -- -- -- -- -- -- -- -- -- -- 0.1 -- 5.0 10 20 - 2.4 - 0.51 - 1.3 - 3.4 0.51 1.3 3.4 -- -- -- -- -- - 4.2 - 0.88 - 2.25 - 8.8 0.88 2.25 8.8 0.00001 5.0 0.005 0.010 0.015 -- -- -- -- -- -- -- 0.1 7.5 5.0 10 20 - 1.7 - 0.36 - 0.9 - 2.4 0.36 0.9 2.4 -- -- -- -- -- -- -- -- -- -- -- -- 1.0 -- 150 300 600 mAdc 3.5 7.0 11 -- -- -- 3.5 7.0 11 2.75 5.50 8.25 -- -- -- 3.5 7.0 11 -- -- -- mAdc Min -- -- -- - 55_C 25_C 125_C Max Min -- -- -- Typ (4.) 0 0 0 Max Min -- -- -- Max Unit Vdc Output Voltage Vin = VDD or 0 "0" Level 0.05 0.05 0.05 -- -- -- 1.5 3.0 4.0 0.05 0.05 0.05 -- -- -- 1.5 3.0 4.0 0.05 0.05 0.05 -- -- -- 1.5 3.0 4.0 Vdc "1" Level Vin = 0 or VDD Input Voltage "0" Level (VO = 4.5 or 0.5 Vdc) (VO = 9.0 or 1.0 Vdc) (VO = 13.5 or 1.5 Vdc) "1" Level (VO = 0.5 or 4.5 Vdc) (VO = 1.0 or 9.0 Vdc) (VO = 1.5 or 13.5 Vdc) Output Drive Current (VOH = 2.5 Vdc) (VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5 Vdc) (VOL = 0.4 Vdc) (VOL = 0.5 Vdc) (VOL = 1.5 Vdc) Input Current Input Capacitance (Vin = 0) Quiescent Current (Per Package) Total Supply Current (5.) (6.) (Dynamic plus Quiescent, Per Package) (CL = 50 pF on all outputs, all buffers switching) VIL -- -- -- -- -- -- 2.25 4.50 6.75 -- -- -- VOH 4.95 9.95 14.95 4.95 9.95 14.95 5.0 10 15 4.95 9.95 14.95 Vdc Vdc Sink Iin Cin IDD Adc pF Adc IT IT = (0.6 A/kHz) f + IDD IT = (1.2 A/kHz) f + IDD IT = (1.8 A/kHz) f + IDD Adc 4. Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance. 5. The formulas given are for the typical characteristics only at 25_C. 6. To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL - 50) Vfk where: IT is in A (per package), CL in pF, V = (VDD - VSS) in volts, f in kHz is input frequency, and k = 0.001.
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MC14585B
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SWITCHING CHARACTERISTICS (7.) (CL = 50 pF, TA = 25_C)
Characteristic Output Rise and Fall Time tTLH, tTHL = (1.5 ns/pF) CL + 25 ns tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns Turn-On, Turn-Off Delay Time tPLH, tPHL = (1.7 ns/pF) CL + 345 ns tPLH, tPHL = (0.66 ns/pF) CL + 147 ns tPLH, tPHL = (0.5 ns/pF) CL + 105 ns Symbol tTLH, tTHL VDD 5.0 10 15 5.0 10 15 Min -- -- -- -- -- -- Typ (8.) 100 50 40 430 180 130 Max 200 100 80 860 360 260 Unit ns tPLH, tPHL ns 7. The formulas given are for the typical characteristics only at 25_C. 8. Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance. 20 ns 20 ns VDD A3 1 2f B3 VSS VOH (A > B)out VOL VOH (A = B)out VOL VOH (A < B)out VOL tTLH Inputs (A>B) and (A=B) high, and inputs B2, A2, B1, A1, B0, A0 and (AB) and (A=B) high, and inputs B3, A3, B2, A2, B1, A1, A0, and (AFigure 1. Dynamic Power Dissipation Signal Waveforms
Figure 2. Dynamic Signal Waveforms
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MC14585B
WORD B = B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 WORD A= A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
VSS VDD VSS (AB) 12 (A < B)out 3 (A = B)out 13 (A > B)out
(A(A=B)
(A>B)
B3 A3 B2 A2 B1 A1 B0 A0 OUTPUT MC14585B
INPUTS
MC14585B
MC14585B WORD B = B11, B10, ..., B0. WORD A = A11, A10, ..., A0.
(A(A=B)
OUTPUTS
(A>B)
Figure 3. Cascading Comparators
LOGIC DIAGRAM
A3 15
B3 A2
14 2
B2 A1
1 7
B1 A0
9 10
B0
11
(A < B)in
5
(A = B)in (A > B)in
6
4
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MC14585B
PACKAGE DIMENSIONS
-A-
16 9
PDIP-16 P SUFFIX PLASTIC DIP PACKAGE CASE 648-08 ISSUE R
B
1
8
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01
F S
C
L
-T- H G D
16 PL
SEATING PLANE
K
J TA
M
M
0.25 (0.010)
M
-A-
SOIC-16 D SUFFIX PLASTIC SOIC PACKAGE CASE 751B-05 ISSUE J
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
16
9
-B-
1 8
P
8 PL
0.25 (0.010)
M
B
S
G F
K C -T-
SEATING PLANE
R
X 45 _
M D
16 PL M
J
0.25 (0.010)
TB
S
A
S
DIM A B C D F G J K M P R
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MC14585B
PACKAGE DIMENSIONS
SOEIAJ-16 F SUFFIX PLASTIC EIAJ SOIC PACKAGE CASE 966-01 ISSUE O
LE Q1 E HE
1 8
16
9
M_ L DETAIL P
Z D e A VIEW P
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 0.78 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.031
c
b 0.13 (0.005)
M
A1 0.10 (0.004)
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MC14585B
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PUBLICATION ORDERING INFORMATION
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MC14585B/D

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